Network processing devices need to read and write to memory for different types of data. These different data types have different characteristics. For example, control type data may require relatively random address accesses in memory with relatively small data transfers for each memory access.
Other types of data, such as streaming data, may be located within a same contiguous address region in memory and may require relatively large data transfers each time memory is accessed. In one example, streaming data refers to a stream of packet data that may all be related to a same Internet session; for example, a stream of video or audio data carried in packets over a same Internet connection.
Current memory architectures do not optimize memory access for these different types of data within the same computing system. For example, many memory architectures use a cache to improve memory performance by caching a subset of data from a main Dynamic Random Access Memory (DRAM). The cache may use a Static Random Access Memory (SRAM) or other buffers that provide faster memory accesses for the subset of data in the cache. The cache is continuously and automatically updated with data from the DRAM that has most recently been accessed. The oldest accessed address locations in the cache are automatically replaced with the newest accessed address locations.
These conventional cache architectures do not efficiently handle different types of memory transfers, such as the streaming data mentioned above. For example, one memory transfer of streaming packet data may completely replace all the entries in the cache. When the streaming data transfer is completed, the cache then has to replace the contents of the cache again other non-streaming data, for example, with data used for conducting control operations. This continuous replacement of entries in the cache may actually slow down memory access time.
Another problem exists because the cache is not configured to efficiently access both streaming data and smaller sized control data. For example, the size of the cache lines may be too small to efficiently cache the streaming data. On the other hand, large cache lines may be too large to effectively cache the smaller randomly accessed control data.
Embodiments of the invention address these and other problems associated with the prior art.